MA, Yuzhe - HKUST Class Schedule & Quota

Class Schedule & Quota
2024-25 Fall 2023-24 Summer 2023-24 Spring 2021-22 Winter
2023-24 Spring
Common Core Course
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COURSE INFO

VECTOR	[3-0-0:3]
DESCRIPTION	This course will introduce fundamental methodologies for VLSI design optimization and design closure. It will cover various topics for improving the VLSI design in many aspects, including performance optimization, power analysis and modeling, timing analysis and closure, physical verification, yield optimization, etc. Students will learn how the design objectives are achieved through different design methodologies and optimizations.

VECTOR

[3-0-0:3]

DESCRIPTION

This course will introduce fundamental methodologies for VLSI design optimization and design closure. It will cover various topics for improving the VLSI design in many aspects, including performance optimization, power analysis and modeling, timing analysis and closure, physical verification, yield optimization, etc. Students will learn how the design objectives are achieved through different design methodologies and optimizations.

MICS 6000Q - VLSI Design Optimization and Closure (3 units)

Section	Date & Time	Room	Instructor	Quota	Enrol	Avail	Wait	Remarks
L01 (6018)	Fr 01:30PM - 04:20PM	Rm 101, W2	MA, Yuzhe	20	6	14	0